|
|
 |
|
|
|
Tw-CAD Designers * => TestWard Lab
St.Petersburg, Russia
Vladimir Golynichev , Ph.D. on computers, leading programmer - ATPG &
library service
e-mail to: zvp@spb.runnet.ru,
phone 7(812) 470-8279
Valentyne Blokhin, Ph.D. on computers - System & Data Bases
programmer,
e-mail to: bvn@IPMI.IFMO.RU
PHONE 7(812) 233-33-80
Yuri Laboda, engineer - System & Data Bases programmer,
e-mail to: LUA@IPMI.IFMO.RU
PHONE 7(812)233-33-80
Igor Duke'off , Ph.D. on computers, Foreign manager , natural English,
dukeI@yell.ru
fax/phone 7(812)583-48-87
|
|
Contributors
|
- Helen Blochina,
engineer - complex nodes analysis
- Andrew Butylin,
engineer - simulator, regular circuits, testless verification based on prototype,
conrtrolability estimations, generation of testable modifications
- Lija Vorobiova,
programmer- table reprezentation of complex elements
- Ilia Zviaguine,
programmer - source language for IC Netlist
- Galina Khamanina,
programmer - observability estimations, generation of testable
modifications, library manager
- Oleg Nemolochnov,
Ph.D. on computers, prof. - theoretical coauthor of hazard analysis &
test generation procedures
- Alex Pershin, engineer
- search for flip-flops assembled with gates
- Konstantyne Plusnin,
programmer - fault grade procedures, recommendations on testability
- Eugeny Shesterkin,
engineer, industrial support - testless verification based upon prototype
- Boris Sloev, Ph.D. on
computers - model of circuit, based upon non-timing Master-Slave circuit
analysis
- Arcady Usviatsky (in
Israel
now), Ph.D. on computers - fault coverage procedures
All
engineers are IFMO graduated or/and postgraduated.
Alma
mater, Affiliation institution is
Institute
of Fine Mechanics & Optics (IFMO)
IFMO,
Sablinskaja street 14, zip code 197101, St.Petersburg, Russia
 |
. |
|
|
